[infinispan-issues] [JBoss JIRA] (ISPN-3518) 1PC can cause a window of inconsistency with L1 invalidation

[William Burns (JIRA)]

William Burns created ISPN-3518:
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             Summary: 1PC can cause a window of inconsistency with L1 invalidation
                 Key: ISPN-3518
                 URL: https://issues.jboss.org/browse/ISPN-3518
             Project: Infinispan
          Issue Type: Bug
          Components: Distributed Cache
            Reporter: William Burns
            Assignee: Mircea Markus


The L1TxInterceptor currently doesn't block on L1 invalidations during a 1PC.  This can cause an inconsistent view of data across non owner nodes.

Example:

{quote}
Node A owns k with value of v1
Node B has k in L1 with value of v1

tx1 started
Node A put k -> v2
Node A sends invalidation
Node A commits
tx1 completed

tx2 started
Node B get k returns v1 from L1
tx2 completed

Node B gets invalidation for k

tx2 started
Node B get k remotely retrieves v2 from Node A
tx2 completed
{quote}

We need to make sure that all L1 invalidations in Tx mode are completed before completing the transaction.

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